Assemblies of integrated circuits generally comprise two integrated circuits fabricated independently and then connected to each other by a bonding method allowing the continuity of certain metallic lines between the two integrated circuits.
Actual assemblies generally comprise through silicon vias (TSVs) intended to connect to a second integrated circuit by passing through the entire thickness of one of the two silicon substrates. The production of such TSVs comprises thinning of one of the two substrates, a deep reactive-ion etch, and bonding, possibly requiring an adhesive.
Production of these TSVs has the drawbacks of increasing the fabrication time of the assembly and of being costly.
It has been proposed to produce interconnects through silicon-on-insulator (SOI) substrates. These interconnects pass through the oxide layers of SOI substrates from which the silicon layer forming the bulk substrate has been removed. The oxide layer of these substrates provides the necessary vertical insulation between the components.
This technique has the drawback of being applicable only to SOI substrates.
The approach, called “direct bond interconnect”, of the American company Ziptronix, allows two integrated-circuit parts to be assembled by directly bonding the layers containing oxide and metal.
It has also been proposed to capacitively couple the metallic lines by bonding only the oxide, after a planarization step. Capacitive connections have the drawback that they can be used only for certain applications, and the reduction of their dimensions is limited.
Finally, it has been proposed to bond the oxide covering two integrated-circuit parts, leaving cavities that open onto the metallic lines, and to anneal with volume expansion of the metal contained in the cavities until a metallic assembly is formed between the two integrated-circuit parts.